From: Ziggy Date: Sat, 12 Jan 2013 16:58:03 +0000 (-0500) Subject: Revert back to my freq table X-Git-Url: https://projects.ziggy471.com/git/gitweb.cgi?p=ziggy471-sgs3-jb.git;a=commitdiff;h=8eb66af7d5aa24f102d06902476963d64e3d6f91 Revert back to my freq table --- --- a/arch/arm/mach-msm/acpuclock-8960.c +++ b/arch/arm/mach-msm/acpuclock-8960.c @@ -69,7 +69,7 @@ #define STBY_KHZ 1 #define MAX_VDD_SC 1400000 /* uV */ -#define MIN_VDD_SC 700000 /* uV */ +#define MIN_VDD_SC 900000 /* uV */ #ifdef CONFIG_VDD_USERSPACE #define HFPLL_NOMINAL_VDD 1050000 @@ -151,11 +151,11 @@ static struct scalable scalable_8960[] = .hfpll_base = MSM_HFPLL_BASE + 0x200, .aux_clk_sel = MSM_ACC0_BASE + 0x014, .l2cpmr_iaddr = L2CPUCPMR_IADDR, - .vreg[VREG_CORE] = { "krait0", 1400000 }, - .vreg[VREG_MEM] = { "krait0_mem", 1250000, + .vreg[VREG_CORE] = { "krait0", 1350000 }, + .vreg[VREG_MEM] = { "krait0_mem", 1150000, RPM_VREG_VOTER1, RPM_VREG_ID_PM8921_L24 }, - .vreg[VREG_DIG] = { "krait0_dig", 1250000, + .vreg[VREG_DIG] = { "krait0_dig", 1150000, RPM_VREG_VOTER1, RPM_VREG_ID_PM8921_S3 }, .vreg[VREG_HFPLL_A] = { "hfpll", 2100000, @@ -169,11 +169,11 @@ static struct scalable scalable_8960[] = .hfpll_base = MSM_HFPLL_BASE + 0x300, .aux_clk_sel = MSM_ACC1_BASE + 0x014, .l2cpmr_iaddr = L2CPUCPMR_IADDR, - .vreg[VREG_CORE] = { "krait1", 1400000 }, - .vreg[VREG_MEM] = { "krait0_mem", 1250000, + .vreg[VREG_CORE] = { "krait1", 1350000 }, + .vreg[VREG_MEM] = { "krait0_mem", 1150000, RPM_VREG_VOTER2, RPM_VREG_ID_PM8921_L24 }, - .vreg[VREG_DIG] = { "krait0_dig", 1250000, + .vreg[VREG_DIG] = { "krait0_dig", 1150000, RPM_VREG_VOTER2, RPM_VREG_ID_PM8921_S3 }, .vreg[VREG_HFPLL_A] = { "hfpll", 2100000, @@ -427,15 +427,15 @@ static struct l2_level l2_freq_tbl_8960_ static struct acpu_level acpu_freq_tbl_8960_kraitv1_slow[] = { { 0, {STBY_KHZ, QSB, 0, 0, 0x00 }, L2(0), 900000 }, { 1, { 384000, PLL_8, 0, 2, 0x00 }, L2(1), 900000 }, - { 1, { 432000, HFPLL, 2, 0, 0x20 }, L2(2), 925000 }, - { 1, { 486000, HFPLL, 2, 0, 0x24 }, L2(3), 925000 }, - { 1, { 540000, HFPLL, 2, 0, 0x28 }, L2(4), 937500 }, - { 1, { 594000, HFPLL, 1, 0, 0x16 }, L2(5), 962500 }, + { 1, { 432000, HFPLL, 2, 0, 0x20 }, L2(6), 925000 }, + { 1, { 486000, HFPLL, 2, 0, 0x24 }, L2(6), 925000 }, + { 1, { 540000, HFPLL, 2, 0, 0x28 }, L2(6), 937500 }, + { 1, { 594000, HFPLL, 1, 0, 0x16 }, L2(6), 962500 }, { 1, { 648000, HFPLL, 1, 0, 0x18 }, L2(6), 987500 }, - { 1, { 702000, HFPLL, 1, 0, 0x1A }, L2(7), 1000000 }, - { 1, { 756000, HFPLL, 1, 0, 0x1C }, L2(8), 1025000 }, - { 1, { 810000, HFPLL, 1, 0, 0x1E }, L2(9), 1062500 }, - { 1, { 864000, HFPLL, 1, 0, 0x20 }, L2(10), 1062500 }, + { 1, { 702000, HFPLL, 1, 0, 0x1A }, L2(6), 1000000 }, + { 1, { 756000, HFPLL, 1, 0, 0x1C }, L2(11), 1025000 }, + { 1, { 810000, HFPLL, 1, 0, 0x1E }, L2(11), 1062500 }, + { 1, { 864000, HFPLL, 1, 0, 0x20 }, L2(11), 1062500 }, { 1, { 918000, HFPLL, 1, 0, 0x22 }, L2(11), 1087500 }, { 0, { 0 } } }; @@ -443,15 +443,15 @@ static struct acpu_level acpu_freq_tbl_8 static struct acpu_level acpu_freq_tbl_8960_kraitv1_nom_fast[] = { { 0, {STBY_KHZ, QSB, 0, 0, 0x00 }, L2(0), 862500 }, { 1, { 384000, PLL_8, 0, 2, 0x00 }, L2(1), 862500 }, - { 1, { 432000, HFPLL, 2, 0, 0x20 }, L2(2), 862500 }, - { 1, { 486000, HFPLL, 2, 0, 0x24 }, L2(3), 887500 }, - { 1, { 540000, HFPLL, 2, 0, 0x28 }, L2(4), 900000 }, - { 1, { 594000, HFPLL, 1, 0, 0x16 }, L2(5), 925000 }, + { 1, { 432000, HFPLL, 2, 0, 0x20 }, L2(6), 862500 }, + { 1, { 486000, HFPLL, 2, 0, 0x24 }, L2(6), 887500 }, + { 1, { 540000, HFPLL, 2, 0, 0x28 }, L2(6), 900000 }, + { 1, { 594000, HFPLL, 1, 0, 0x16 }, L2(6), 925000 }, { 1, { 648000, HFPLL, 1, 0, 0x18 }, L2(6), 925000 }, - { 1, { 702000, HFPLL, 1, 0, 0x1A }, L2(7), 937500 }, - { 1, { 756000, HFPLL, 1, 0, 0x1C }, L2(8), 962500 }, - { 1, { 810000, HFPLL, 1, 0, 0x1E }, L2(9), 1012500 }, - { 1, { 864000, HFPLL, 1, 0, 0x20 }, L2(10), 1025000 }, + { 1, { 702000, HFPLL, 1, 0, 0x1A }, L2(6), 937500 }, + { 1, { 756000, HFPLL, 1, 0, 0x1C }, L2(11), 962500 }, + { 1, { 810000, HFPLL, 1, 0, 0x1E }, L2(11), 1012500 }, + { 1, { 864000, HFPLL, 1, 0, 0x20 }, L2(11), 1025000 }, { 1, { 918000, HFPLL, 1, 0, 0x22 }, L2(11), 1025000 }, { 0, { 0 } } }; @@ -459,163 +459,142 @@ static struct acpu_level acpu_freq_tbl_8 #undef L2 #define L2(x) (&l2_freq_tbl_8960_kraitv2[(x)]) - static struct l2_level l2_freq_tbl_8960_kraitv2[] = { [0] = { {STBY_KHZ, QSB, 0, 0, 0x00 }, 1050000, 1050000, 0 }, - [1] = { { 384000, PLL_8, 0, 2, 0x00 }, 1050000, 1050000, 1 }, //133mhz fsb - [2] = { { 432000, HFPLL, 2, 0, 0x20 }, 1050000, 1050000, 3 }, //266mhz fsb - [3] = { { 486000, HFPLL, 2, 0, 0x24 }, 1050000, 1050000, 3 }, //266mhz fsb - [4] = { { 540000, HFPLL, 2, 0, 0x28 }, 1050000, 1050000, 3 }, //266mhz fsb - [5] = { { 594000, HFPLL, 1, 0, 0x16 }, 1050000, 1050000, 3 }, //266mhz fsb - [6] = { { 648000, HFPLL, 1, 0, 0x18 }, 1050000, 1050000, 4 }, //400mhz fsb - [7] = { { 702000, HFPLL, 1, 0, 0x1A }, 1050000, 1050000, 4 }, //400mhz fsb - [8] = { { 756000, HFPLL, 1, 0, 0x1C }, 1150000, 1150000, 4 }, //400mhz fsb - [9] = { { 810000, HFPLL, 1, 0, 0x1E }, 1150000, 1150000, 4 }, //400mhz fsb - [10] = { { 864000, HFPLL, 1, 0, 0x20 }, 1150000, 1150000, 4 }, //400mhz fsb - [11] = { { 918000, HFPLL, 1, 0, 0x22 }, 1150000, 1150000, 7 }, //533mhz fsb - [12] = { { 972000, HFPLL, 1, 0, 0x24 }, 1150000, 1150000, 7 }, //533mhz fsb - [13] = { { 1026000, HFPLL, 1, 0, 0x26 }, 1150000, 1150000, 7 }, //533mhz fsb - [14] = { { 1080000, HFPLL, 1, 0, 0x28 }, 1150000, 1150000, 7 }, //533mhz fsb - [15] = { { 1134000, HFPLL, 1, 0, 0x2A }, 1150000, 1150000, 7 }, //533mhz fsb - [16] = { { 1188000, HFPLL, 1, 0, 0x2C }, 1150000, 1150000, 7 }, //533mhz fsb - [17] = { { 1242000, HFPLL, 1, 0, 0x2E }, 1150000, 1150000, 7 }, //533mhz fsb - [18] = { { 1296000, HFPLL, 1, 0, 0x30 }, 1150000, 1150000, 7 }, //533mhz fsb - [19] = { { 1350000, HFPLL, 1, 0, 0x31 }, 1150000, 1150000, 7 }, //533mhz fsb - [20] = { { 1458000, HFPLL, 1, 0, 0x32 }, 1150000, 1150000, 8 }, //566mhz fsb - [21] = { { 1512000, HFPLL, 1, 0, 0x33 }, 1150000, 1150000, 9 }, //578mhz fsb - [22] = { { 1674000, HFPLL, 1, 0, 0x34 }, 1150000, 1150000, 10 }, //600mhz fsb - [23] = { { 1728000, HFPLL, 1, 0, 0x35 }, 1150000, 1150000, 11 }, //6667mhz fsb + [1] = { { 384000, PLL_8, 0, 2, 0x00 }, 1050000, 1050000, 1 }, + [2] = { { 432000, HFPLL, 2, 0, 0x20 }, 1050000, 1050000, 2 }, + [3] = { { 486000, HFPLL, 2, 0, 0x24 }, 1050000, 1050000, 2 }, + [4] = { { 540000, HFPLL, 2, 0, 0x28 }, 1050000, 1050000, 2 }, + [5] = { { 594000, HFPLL, 1, 0, 0x16 }, 1050000, 1050000, 2 }, + [6] = { { 648000, HFPLL, 1, 0, 0x18 }, 1050000, 1050000, 4 }, + [7] = { { 702000, HFPLL, 1, 0, 0x1A }, 1050000, 1050000, 4 }, + [8] = { { 756000, HFPLL, 1, 0, 0x1C }, 1150000, 1150000, 4 }, + [9] = { { 810000, HFPLL, 1, 0, 0x1E }, 1150000, 1150000, 4 }, + [10] = { { 864000, HFPLL, 1, 0, 0x20 }, 1150000, 1150000, 4 }, + [11] = { { 918000, HFPLL, 1, 0, 0x22 }, 1150000, 1150000, 6 }, + [12] = { { 972000, HFPLL, 1, 0, 0x24 }, 1150000, 1150000, 6 }, + [13] = { { 1026000, HFPLL, 1, 0, 0x26 }, 1150000, 1150000, 6 }, + [14] = { { 1080000, HFPLL, 1, 0, 0x28 }, 1150000, 1150000, 6 }, + [15] = { { 1134000, HFPLL, 1, 0, 0x2A }, 1150000, 1150000, 6 }, + [16] = { { 1188000, HFPLL, 1, 0, 0x2C }, 1150000, 1150000, 7 }, + [17] = { { 1242000, HFPLL, 1, 0, 0x2E }, 1150000, 1150000, 7 }, + [18] = { { 1296000, HFPLL, 1, 0, 0x30 }, 1150000, 1150000, 7 }, + [19] = { { 1350000, HFPLL, 1, 0, 0x32 }, 1150000, 1150000, 7 }, }; static struct acpu_level acpu_freq_tbl_8960_kraitv2_slow[] = { { 0, { STBY_KHZ, QSB, 0, 0, 0x00 }, L2(0), 950000 }, { 1, { 384000, PLL_8, 0, 2, 0x00 }, L2(1), 950000 }, - { 1, { 432000, HFPLL, 2, 0, 0x20 }, L2(2), 975000 }, - { 1, { 486000, HFPLL, 2, 0, 0x24 }, L2(3), 975000 }, - { 1, { 540000, HFPLL, 2, 0, 0x28 }, L2(4), 1000000 }, - { 1, { 594000, HFPLL, 1, 0, 0x16 }, L2(5), 1000000 }, - { 1, { 648000, HFPLL, 1, 0, 0x18 }, L2(6), 1025000 }, + { 0, { 432000, HFPLL, 2, 0, 0x20 }, L2(7), 975000 }, + { 1, { 486000, HFPLL, 2, 0, 0x24 }, L2(7), 975000 }, + { 0, { 540000, HFPLL, 2, 0, 0x28 }, L2(7), 1000000 }, + { 1, { 594000, HFPLL, 1, 0, 0x16 }, L2(7), 1000000 }, + { 0, { 648000, HFPLL, 1, 0, 0x18 }, L2(7), 1025000 }, { 1, { 702000, HFPLL, 1, 0, 0x1A }, L2(7), 1025000 }, - { 1, { 756000, HFPLL, 1, 0, 0x1C }, L2(8), 1075000 }, - { 1, { 810000, HFPLL, 1, 0, 0x1E }, L2(9), 1075000 }, - { 1, { 864000, HFPLL, 1, 0, 0x20 }, L2(10), 1100000 }, - { 1, { 918000, HFPLL, 1, 0, 0x22 }, L2(11), 1100000 }, - { 1, { 972000, HFPLL, 1, 0, 0x24 }, L2(12), 1125000 }, - { 1, { 1026000, HFPLL, 1, 0, 0x26 }, L2(13), 1125000 }, - { 1, { 1080000, HFPLL, 1, 0, 0x28 }, L2(14), 1175000 }, - { 1, { 1134000, HFPLL, 1, 0, 0x2A }, L2(15), 1175000 }, - { 1, { 1188000, HFPLL, 1, 0, 0x2C }, L2(16), 1200000 }, - { 1, { 1242000, HFPLL, 1, 0, 0x2E }, L2(17), 1200000 }, - { 1, { 1296000, HFPLL, 1, 0, 0x30 }, L2(18), 1225000 }, - { 1, { 1350000, HFPLL, 1, 0, 0x32 }, L2(19), 1225000 }, - { 1, { 1404000, HFPLL, 1, 0, 0x34 }, L2(19), 1237500 }, - { 1, { 1458000, HFPLL, 1, 0, 0x36 }, L2(20), 1237500 }, - { 1, { 1512000, HFPLL, 1, 0, 0x38 }, L2(21), 1250000 }, - { 1, { 1674000, HFPLL, 1, 0, 0x3A }, L2(22), 1275000 }, - { 1, { 1728000, HFPLL, 1, 0, 0x3C }, L2(23), 1262500 }, - { 1, { 1809000, HFPLL, 1, 0, 0x3E }, L2(21), 1262500 }, - { 1, { 1890000, HFPLL, 1, 0, 0x40 }, L2(21), 1300000 }, - { 1, { 1998000, HFPLL, 1, 0, 0x42 }, L2(20), 1325000 }, - { 1, { 2106000, HFPLL, 1, 0, 0x44 }, L2(20), 1350000 }, + { 0, { 756000, HFPLL, 1, 0, 0x1C }, L2(7), 1075000 }, + { 1, { 810000, HFPLL, 1, 0, 0x1E }, L2(7), 1075000 }, + { 0, { 864000, HFPLL, 1, 0, 0x20 }, L2(7), 1100000 }, + { 1, { 918000, HFPLL, 1, 0, 0x22 }, L2(7), 1100000 }, + { 0, { 972000, HFPLL, 1, 0, 0x24 }, L2(7), 1125000 }, + { 1, { 1026000, HFPLL, 1, 0, 0x26 }, L2(7), 1125000 }, + { 0, { 1080000, HFPLL, 1, 0, 0x28 }, L2(16), 1175000 }, + { 1, { 1134000, HFPLL, 1, 0, 0x2A }, L2(16), 1175000 }, + { 0, { 1188000, HFPLL, 1, 0, 0x2C }, L2(16), 1200000 }, + { 1, { 1242000, HFPLL, 1, 0, 0x2E }, L2(16), 1200000 }, + { 0, { 1296000, HFPLL, 1, 0, 0x30 }, L2(16), 1225000 }, + { 1, { 1350000, HFPLL, 1, 0, 0x32 }, L2(16), 1225000 }, + { 0, { 1404000, HFPLL, 1, 0, 0x34 }, L2(16), 1237500 }, + { 1, { 1458000, HFPLL, 1, 0, 0x36 }, L2(16), 1237500 }, + { 1, { 1512000, HFPLL, 1, 0, 0x38 }, L2(16), 1250000 }, { 0, { 0 } } }; static struct acpu_level acpu_freq_tbl_8960_kraitv2_nom[] = { - { 0, { STBY_KHZ, QSB, 0, 0, 0x00 }, L2(0), 900000 }, - { 1, { 384000, PLL_8, 0, 2, 0x00 }, L2(1), 900000 }, - { 1, { 432000, HFPLL, 2, 0, 0x20 }, L2(2), 925000 }, - { 1, { 486000, HFPLL, 2, 0, 0x24 }, L2(3), 925000 }, - { 1, { 540000, HFPLL, 2, 0, 0x28 }, L2(4), 950000 }, - { 1, { 594000, HFPLL, 1, 0, 0x16 }, L2(5), 950000 }, - { 1, { 648000, HFPLL, 1, 0, 0x18 }, L2(6), 975000 }, - { 1, { 702000, HFPLL, 1, 0, 0x1A }, L2(7), 975000 }, - { 1, { 756000, HFPLL, 1, 0, 0x1C }, L2(8), 1025000 }, - { 1, { 810000, HFPLL, 1, 0, 0x1E }, L2(9), 1025000 }, - { 1, { 864000, HFPLL, 1, 0, 0x20 }, L2(10), 1050000 }, - { 1, { 918000, HFPLL, 1, 0, 0x22 }, L2(11), 1050000 }, - { 1, { 972000, HFPLL, 1, 0, 0x24 }, L2(12), 1075000 }, - { 1, { 1026000, HFPLL, 1, 0, 0x26 }, L2(13), 1075000 }, - { 1, { 1080000, HFPLL, 1, 0, 0x28 }, L2(14), 1125000 }, - { 1, { 1134000, HFPLL, 1, 0, 0x2A }, L2(15), 1125000 }, - { 1, { 1188000, HFPLL, 1, 0, 0x2C }, L2(16), 1150000 }, - { 1, { 1242000, HFPLL, 1, 0, 0x2E }, L2(17), 1150000 }, - { 1, { 1296000, HFPLL, 1, 0, 0x30 }, L2(18), 1175000 }, - { 1, { 1350000, HFPLL, 1, 0, 0x32 }, L2(19), 1175000 }, - { 1, { 1404000, HFPLL, 1, 0, 0x34 }, L2(19), 1187500 }, - { 1, { 1458000, HFPLL, 1, 0, 0x36 }, L2(20), 1187500 }, - { 1, { 1512000, HFPLL, 1, 0, 0x38 }, L2(21), 1200000 }, - { 1, { 1674000, HFPLL, 1, 0, 0x3A }, L2(22), 1200000 }, - { 1, { 1728000, HFPLL, 1, 0, 0x3C }, L2(23), 1250000 }, - { 1, { 1809000, HFPLL, 1, 0, 0x3E }, L2(21), 1275000 }, - { 1, { 1900000, HFPLL, 1, 0, 0x40 }, L2(21), 1325000 }, - { 1, { 1998000, HFPLL, 1, 0, 0x42 }, L2(20), 1325000 }, - { 1, { 2106000, HFPLL, 1, 0, 0x44 }, L2(20), 1350000 }, + { 0, { STBY_KHZ, QSB, 0, 0, 0x00 }, L2(0), 800000 }, + { 1, { 384000, PLL_8, 0, 2, 0x00 }, L2(1), 800000 }, + { 0, { 432000, HFPLL, 2, 0, 0x20 }, L2(7), 825000 }, + { 1, { 486000, HFPLL, 2, 0, 0x24 }, L2(7), 850000 }, + { 0, { 540000, HFPLL, 2, 0, 0x28 }, L2(7), 850000 }, + { 1, { 594000, HFPLL, 1, 0, 0x16 }, L2(7), 850000 }, + { 0, { 648000, HFPLL, 1, 0, 0x18 }, L2(7), 900000 }, + { 1, { 702000, HFPLL, 1, 0, 0x1A }, L2(7), 900000 }, + { 0, { 756000, HFPLL, 1, 0, 0x1C }, L2(7), 950000 }, + { 1, { 810000, HFPLL, 1, 0, 0x1E }, L2(7), 950000 }, + { 0, { 864000, HFPLL, 1, 0, 0x20 }, L2(7), 975000 }, + { 1, { 918000, HFPLL, 1, 0, 0x22 }, L2(7), 975000 }, + { 0, { 972000, HFPLL, 1, 0, 0x24 }, L2(7), 1025000 }, + { 1, { 1026000, HFPLL, 1, 0, 0x26 }, L2(7), 1025000 }, + { 0, { 1080000, HFPLL, 1, 0, 0x28 }, L2(16), 1050000 }, + { 1, { 1134000, HFPLL, 1, 0, 0x2A }, L2(16), 1050000 }, + { 0, { 1188000, HFPLL, 1, 0, 0x2C }, L2(16), 1075000 }, + { 1, { 1242000, HFPLL, 1, 0, 0x2E }, L2(16), 1075000 }, + { 0, { 1296000, HFPLL, 1, 0, 0x30 }, L2(16), 1125000 }, + { 1, { 1350000, HFPLL, 1, 0, 0x32 }, L2(16), 1125000 }, + { 0, { 1404000, HFPLL, 1, 0, 0x34 }, L2(16), 1125000 }, + { 1, { 1458000, HFPLL, 1, 0, 0x36 }, L2(16), 1150000 }, + { 1, { 1512000, HFPLL, 1, 0, 0x38 }, L2(18), 1150000 }, + { 1, { 1674000, HFPLL, 1, 0, 0x3A }, L2(18), 1200000 }, + { 1, { 1728000, HFPLL, 1, 0, 0x3C }, L2(19), 1200000 }, + { 1, { 1809000, HFPLL, 1, 0, 0x3E }, L2(19), 1250000 }, + { 1, { 1900000, HFPLL, 1, 0, 0x40 }, L2(19), 1300000 }, { 0, { 0 } } }; static struct acpu_level acpu_freq_tbl_8960_kraitv2_fast[] = { { 0, { STBY_KHZ, QSB, 0, 0, 0x00 }, L2(0), 850000 }, { 1, { 384000, PLL_8, 0, 2, 0x00 }, L2(1), 850000 }, - { 1, { 432000, HFPLL, 2, 0, 0x20 }, L2(2), 875000 }, - { 1, { 486000, HFPLL, 2, 0, 0x24 }, L2(3), 875000 }, - { 1, { 540000, HFPLL, 2, 0, 0x28 }, L2(4), 900000 }, - { 1, { 594000, HFPLL, 1, 0, 0x16 }, L2(5), 900000 }, - { 1, { 648000, HFPLL, 1, 0, 0x18 }, L2(6), 925000 }, + { 0, { 432000, HFPLL, 2, 0, 0x20 }, L2(7), 850000 }, + { 1, { 486000, HFPLL, 2, 0, 0x24 }, L2(7), 850000 }, + { 0, { 540000, HFPLL, 2, 0, 0x28 }, L2(7), 900000 }, + { 1, { 594000, HFPLL, 1, 0, 0x16 }, L2(7), 900000 }, + { 0, { 648000, HFPLL, 1, 0, 0x18 }, L2(7), 925000 }, { 1, { 702000, HFPLL, 1, 0, 0x1A }, L2(7), 925000 }, - { 1, { 756000, HFPLL, 1, 0, 0x1C }, L2(8), 975000 }, - { 1, { 810000, HFPLL, 1, 0, 0x1E }, L2(9), 975000 }, - { 1, { 864000, HFPLL, 1, 0, 0x20 }, L2(10), 1000000 }, - { 1, { 918000, HFPLL, 1, 0, 0x22 }, L2(11), 1000000 }, - { 1, { 972000, HFPLL, 1, 0, 0x24 }, L2(12), 1025000 }, - { 1, { 1026000, HFPLL, 1, 0, 0x26 }, L2(13), 1025000 }, - { 1, { 1080000, HFPLL, 1, 0, 0x28 }, L2(14), 1075000 }, - { 1, { 1134000, HFPLL, 1, 0, 0x2A }, L2(15), 1075000 }, - { 1, { 1188000, HFPLL, 1, 0, 0x2C }, L2(16), 1100000 }, - { 1, { 1242000, HFPLL, 1, 0, 0x2E }, L2(17), 1100000 }, - { 1, { 1296000, HFPLL, 1, 0, 0x30 }, L2(18), 1125000 }, - { 1, { 1350000, HFPLL, 1, 0, 0x32 }, L2(19), 1125000 }, - { 1, { 1404000, HFPLL, 1, 0, 0x34 }, L2(19), 1137500 }, - { 1, { 1458000, HFPLL, 1, 0, 0x36 }, L2(20), 1137500 }, - { 1, { 1512000, HFPLL, 1, 0, 0x38 }, L2(21), 1150000 }, - { 1, { 1674000, HFPLL, 1, 0, 0x3A }, L2(22), 1175000 }, - { 1, { 1728000, HFPLL, 1, 0, 0x3C }, L2(23), 1200000 }, - { 1, { 1809000, HFPLL, 1, 0, 0x3E }, L2(21), 1250000 }, - { 1, { 1900000, HFPLL, 1, 0, 0x40 }, L2(21), 1300000 }, - { 1, { 1998000, HFPLL, 1, 0, 0x42 }, L2(20), 1325000 }, - { 1, { 2106000, HFPLL, 1, 0, 0x44 }, L2(20), 1350000 }, + { 0, { 756000, HFPLL, 1, 0, 0x1C }, L2(7), 975000 }, + { 1, { 810000, HFPLL, 1, 0, 0x1E }, L2(7), 975000 }, + { 0, { 864000, HFPLL, 1, 0, 0x20 }, L2(7), 1000000 }, + { 1, { 918000, HFPLL, 1, 0, 0x22 }, L2(7), 1000000 }, + { 0, { 972000, HFPLL, 1, 0, 0x24 }, L2(7), 1025000 }, + { 1, { 1026000, HFPLL, 1, 0, 0x26 }, L2(7), 1025000 }, + { 0, { 1080000, HFPLL, 1, 0, 0x28 }, L2(16), 1075000 }, + { 1, { 1134000, HFPLL, 1, 0, 0x2A }, L2(16), 1075000 }, + { 0, { 1188000, HFPLL, 1, 0, 0x2C }, L2(16), 1100000 }, + { 1, { 1242000, HFPLL, 1, 0, 0x2E }, L2(16), 1100000 }, + { 0, { 1296000, HFPLL, 1, 0, 0x30 }, L2(16), 1125000 }, + { 1, { 1350000, HFPLL, 1, 0, 0x32 }, L2(16), 1125000 }, + { 0, { 1404000, HFPLL, 1, 0, 0x34 }, L2(16), 1125000 }, + { 1, { 1458000, HFPLL, 1, 0, 0x36 }, L2(16), 1137500 }, + { 1, { 1512000, HFPLL, 1, 0, 0x38 }, L2(18), 1150000 }, + { 1, { 1674000, HFPLL, 1, 0, 0x3A }, L2(18), 1175000 }, + { 1, { 1728000, HFPLL, 1, 0, 0x3C }, L2(19), 1200000 }, + { 1, { 1809000, HFPLL, 1, 0, 0x3E }, L2(19), 1250000 }, + { 1, { 1998000, HFPLL, 1, 0, 0x42 }, L2(19), 1300000 }, { 0, { 0 } } }; static struct acpu_level acpu_freq_tbl_8960_kraitv2_f3[] = { { 0, { STBY_KHZ, QSB, 0, 0, 0x00 }, L2(0), 850000 }, { 1, { 384000, PLL_8, 0, 2, 0x00 }, L2(1), 850000 }, - { 1, { 432000, HFPLL, 2, 0, 0x20 }, L2(2), 875000 }, - { 1, { 486000, HFPLL, 2, 0, 0x24 }, L2(3), 875000 }, - { 1, { 540000, HFPLL, 2, 0, 0x28 }, L2(4), 900000 }, - { 1, { 594000, HFPLL, 1, 0, 0x16 }, L2(5), 900000 }, - { 1, { 648000, HFPLL, 1, 0, 0x18 }, L2(6), 925000 }, + { 0, { 432000, HFPLL, 2, 0, 0x20 }, L2(7), 875000 }, + { 1, { 486000, HFPLL, 2, 0, 0x24 }, L2(7), 875000 }, + { 0, { 540000, HFPLL, 2, 0, 0x28 }, L2(7), 900000 }, + { 1, { 594000, HFPLL, 1, 0, 0x16 }, L2(7), 900000 }, + { 0, { 648000, HFPLL, 1, 0, 0x18 }, L2(7), 925000 }, { 1, { 702000, HFPLL, 1, 0, 0x1A }, L2(7), 925000 }, - { 1, { 756000, HFPLL, 1, 0, 0x1C }, L2(8), 975000 }, - { 1, { 810000, HFPLL, 1, 0, 0x1E }, L2(9), 975000 }, - { 1, { 864000, HFPLL, 1, 0, 0x20 }, L2(10), 1000000 }, - { 1, { 918000, HFPLL, 1, 0, 0x22 }, L2(11), 1000000 }, - { 1, { 972000, HFPLL, 1, 0, 0x24 }, L2(12), 1012500 }, - { 1, { 1026000, HFPLL, 1, 0, 0x26 }, L2(13), 1012500 }, - { 1, { 1080000, HFPLL, 1, 0, 0x28 }, L2(14), 1050000 }, - { 1, { 1134000, HFPLL, 1, 0, 0x2A }, L2(15), 1050000 }, - { 1, { 1188000, HFPLL, 1, 0, 0x2C }, L2(16), 1075000 }, - { 1, { 1242000, HFPLL, 1, 0, 0x2E }, L2(17), 1075000 }, - { 1, { 1296000, HFPLL, 1, 0, 0x30 }, L2(18), 1100000 }, - { 1, { 1350000, HFPLL, 1, 0, 0x32 }, L2(19), 1100000 }, - { 1, { 1404000, HFPLL, 1, 0, 0x34 }, L2(19), 1112500 }, - { 1, { 1458000, HFPLL, 1, 0, 0x36 }, L2(20), 1112500 }, - { 1, { 1512000, HFPLL, 1, 0, 0x38 }, L2(21), 1125000 }, - { 1, { 1674000, HFPLL, 1, 0, 0x3A }, L2(22), 1175000 }, - { 1, { 1728000, HFPLL, 1, 0, 0x3C }, L2(23), 1200000 }, - { 1, { 1809000, HFPLL, 1, 0, 0x3E }, L2(21), 1250000 }, - { 1, { 1900000, HFPLL, 1, 0, 0x40 }, L2(21), 1300000 }, - { 1, { 1998000, HFPLL, 1, 0, 0x42 }, L2(20), 1325000 }, - { 1, { 2106000, HFPLL, 1, 0, 0x44 }, L2(20), 1350000 }, + { 0, { 756000, HFPLL, 1, 0, 0x1C }, L2(7), 975000 }, + { 1, { 810000, HFPLL, 1, 0, 0x1E }, L2(7), 975000 }, + { 0, { 864000, HFPLL, 1, 0, 0x20 }, L2(7), 1000000 }, + { 1, { 918000, HFPLL, 1, 0, 0x22 }, L2(7), 1000000 }, + { 0, { 972000, HFPLL, 1, 0, 0x24 }, L2(7), 1012500 }, + { 1, { 1026000, HFPLL, 1, 0, 0x26 }, L2(7), 1012500 }, + { 0, { 1080000, HFPLL, 1, 0, 0x28 }, L2(16), 1050000 }, + { 1, { 1134000, HFPLL, 1, 0, 0x2A }, L2(16), 1050000 }, + { 0, { 1188000, HFPLL, 1, 0, 0x2C }, L2(16), 1075000 }, + { 1, { 1242000, HFPLL, 1, 0, 0x2E }, L2(16), 1075000 }, + { 0, { 1296000, HFPLL, 1, 0, 0x30 }, L2(16), 1100000 }, + { 1, { 1350000, HFPLL, 1, 0, 0x32 }, L2(16), 1100000 }, + { 0, { 1404000, HFPLL, 1, 0, 0x34 }, L2(16), 1112500 }, + { 1, { 1458000, HFPLL, 1, 0, 0x36 }, L2(16), 1112500 }, + { 1, { 1512000, HFPLL, 1, 0, 0x38 }, L2(16), 1125000 }, { 0, { 0 } } }; @@ -1398,7 +1377,6 @@ static struct notifier_block __cpuinitda .notifier_call = acpuclock_cpu_callback, }; -#if 0 static const int krait_needs_vmin(void) { switch (read_cpuid_id()) { @@ -1417,7 +1395,6 @@ static void kraitv2_apply_vmin(struct ac if (tbl->vdd_core < MIN_VDD_SC) tbl->vdd_core = MIN_VDD_SC; } -#endif #ifdef CONFIG_SEC_L1_DCACHE_PANIC_CHK uint32_t global_sec_pvs_value; @@ -1516,10 +1493,9 @@ static struct acpu_level * __init select } else { BUG(); } -#if 0 + if (krait_needs_vmin()) kraitv2_apply_vmin(acpu_freq_tbl); -#endif /* Find the max supported scaling frequency. */ for (l = acpu_freq_tbl; l->speed.khz != 0; l++)