From: Chad Goodman Date: Tue, 11 Dec 2012 07:19:08 +0000 (-0800) Subject: GPU: raise 3D max clock to 512MHz and 2D max clock to 320MHz X-Git-Url: https://projects.ziggy471.com/git/gitweb.cgi?p=ziggy471-sgs3-jb.git;a=commitdiff;h=74e52f96770db2b80ede6b8d20dbcef891dc919a GPU: raise 3D max clock to 512MHz and 2D max clock to 320MHz Signed-off-by: Ziggy --- --- a/arch/arm/mach-msm/clock-8960.c +++ b/arch/arm/mach-msm/clock-8960.c @@ -3242,9 +3242,10 @@ static struct clk_freq_tbl clk_tbl_gfx2d F_GFX2D(128000000, pll8, 1, 3), F_GFX2D(145455000, pll2, 2, 11), F_GFX2D(160000000, pll2, 1, 5), - F_GFX2D(177778000, pll2, 2, 9), - F_GFX2D(200000000, pll2, 1, 4), + F_GFX2D(228571000, pll2, 2, 9), + F_GFX2D(266667000, pll2, 1, 4), F_GFX2D(300000000, pll2, 2, 7), + F_GFX2D(320000000, pll2, 1, 3), F_END }; @@ -3286,8 +3287,8 @@ static struct rcg_clk gfx2d0_clk = { .c = { .dbg_name = "gfx2d0_clk", .ops = &clk_ops_rcg_8960, - VDD_DIG_FMAX_MAP3(LOW, 100000000, NOMINAL, 200000000, - HIGH, 300000000), + VDD_DIG_FMAX_MAP3(LOW, 100000000, NOMINAL, 266667000, + HIGH, 320000000), CLK_INIT(gfx2d0_clk.c), }, }; @@ -3330,8 +3331,8 @@ static struct rcg_clk gfx2d1_clk = { .c = { .dbg_name = "gfx2d1_clk", .ops = &clk_ops_rcg_8960, - VDD_DIG_FMAX_MAP3(LOW, 100000000, NOMINAL, 200000000, - HIGH, 300000000), + VDD_DIG_FMAX_MAP3(LOW, 100000000, NOMINAL, 266667000, + HIGH, 320000000), CLK_INIT(gfx2d1_clk.c), }, }; @@ -3359,9 +3360,11 @@ static struct clk_freq_tbl clk_tbl_gfx3d F_GFX3D(160000000, pll2, 1, 5), F_GFX3D(177778000, pll2, 2, 9), F_GFX3D(200000000, pll2, 1, 4), - F_GFX3D(228571000, pll2, 2, 7), - F_GFX3D(266667000, pll2, 1, 3), - F_GFX3D(320000000, pll2, 2, 5), + F_GFX3D(266667000, pll2, 2, 7), + F_GFX3D(320000000, pll2, 1, 3), + F_GFX3D(400000000, pll2, 3, 8), + F_GFX3D(450000000, pll2, 1, 2), + F_GFX3D(512000000, pll2, 2, 5), F_END }; @@ -3383,41 +3386,14 @@ static struct clk_freq_tbl clk_tbl_gfx3d F_GFX3D(300000000, pll3, 1, 4), F_GFX3D(320000000, pll2, 2, 5), F_GFX3D(400000000, pll2, 1, 2), + F_GFX3D(512000000, pll2, 1, 2), F_END }; static unsigned long fmax_gfx3d_8960_v2[MAX_VDD_LEVELS] __initdata = { [VDD_DIG_LOW] = 128000000, - [VDD_DIG_NOMINAL] = 300000000, - [VDD_DIG_HIGH] = 400000000 -}; - -static struct clk_freq_tbl clk_tbl_gfx3d_8960_oc[] = { - F_GFX3D( 0, gnd, 0, 0), - F_GFX3D( 27000000, pxo, 0, 0), - F_GFX3D( 48000000, pll8, 1, 8), - F_GFX3D( 54857000, pll8, 1, 7), - F_GFX3D( 64000000, pll8, 1, 6), - F_GFX3D( 76800000, pll8, 1, 5), - F_GFX3D( 96000000, pll8, 1, 4), - F_GFX3D(128000000, pll8, 1, 3), - F_GFX3D(145455000, pll2, 2, 11), - F_GFX3D(160000000, pll2, 1, 5), - F_GFX3D(177778000, pll2, 2, 9), - F_GFX3D(200000000, pll2, 1, 4), - F_GFX3D(228571000, pll2, 2, 7), - F_GFX3D(266667000, pll2, 1, 3), - F_GFX3D(300000000, pll3, 1, 4), - F_GFX3D(320000000, pll2, 2, 5), - F_GFX3D(400000000, pll2, 1, 2), - F_GFX3D(480000000, pll3, 2, 5), - F_END -}; - -static unsigned long fmax_gfx3d_8960_oc[MAX_VDD_LEVELS] __initdata = { - [VDD_DIG_LOW] = 128000000, [VDD_DIG_NOMINAL] = 320000000, - [VDD_DIG_HIGH] = 480000000 + [VDD_DIG_HIGH] = 512000000 }; static struct clk_freq_tbl clk_tbl_gfx3d_8064[] = { @@ -3436,14 +3412,14 @@ static struct clk_freq_tbl clk_tbl_gfx3d F_GFX3D(228571000, pll2, 2, 7), F_GFX3D(266667000, pll2, 1, 3), F_GFX3D(325000000, pll15, 1, 3), - F_GFX3D(400000000, pll2, 1, 2), + F_GFX3D(512000000, pll2, 1, 2), F_END }; static unsigned long fmax_gfx3d_8064[MAX_VDD_LEVELS] __initdata = { [VDD_DIG_LOW] = 128000000, [VDD_DIG_NOMINAL] = 325000000, - [VDD_DIG_HIGH] = 400000000 + [VDD_DIG_HIGH] = 512000000 }; static struct bank_masks bmnd_info_gfx3d = { @@ -3484,8 +3460,8 @@ static struct rcg_clk gfx3d_clk = { .c = { .dbg_name = "gfx3d_clk", .ops = &clk_ops_rcg_8960, - VDD_DIG_FMAX_MAP3(LOW, 128000000, NOMINAL, 266667000, - HIGH, 320000000), + VDD_DIG_FMAX_MAP3(LOW, 128000000, NOMINAL, 320000000, + HIGH, 512000000), CLK_INIT(gfx3d_clk.c), .depends = &gmem_axi_clk.c, }, @@ -4144,6 +4120,7 @@ static struct clk_freq_tbl clk_tbl_vpe[] F_VPE( 96000000, pll8, 4), F_VPE(100000000, pll2, 8), F_VPE(160000000, pll2, 5), + F_VPE(200000000, pll2, 4), F_END }; @@ -4167,7 +4144,7 @@ static struct rcg_clk vpe_clk = { .c = { .dbg_name = "vpe_clk", .ops = &clk_ops_rcg_8960, - VDD_DIG_FMAX_MAP2(LOW, 76800000, NOMINAL, 160000000), + VDD_DIG_FMAX_MAP2(LOW, 76800000, NOMINAL, 200000000), CLK_INIT(vpe_clk.c), .depends = &vpe_axi_clk.c, }, @@ -5916,9 +5893,9 @@ static void __init msm8960_clock_init(vo memcpy(msm_clocks_8960, msm_clocks_8960_v1, sizeof(msm_clocks_8960_v1)); if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) >= 2) { - gfx3d_clk.freq_tbl = clk_tbl_gfx3d_8960_oc; + gfx3d_clk.freq_tbl = clk_tbl_gfx3d_8960_v2; - memcpy(gfx3d_clk.c.fmax, fmax_gfx3d_8960_oc, + memcpy(gfx3d_clk.c.fmax, fmax_gfx3d_8960_v2, sizeof(gfx3d_clk.c.fmax)); memcpy(ijpeg_clk.c.fmax, fmax_ijpeg_8960_v2, sizeof(ijpeg_clk.c.fmax)); --- a/arch/arm/mach-msm/devices-8960.c +++ b/arch/arm/mach-msm/devices-8960.c @@ -2613,7 +2613,7 @@ static struct msm_bus_vectors grp3d_low_ .src = MSM_BUS_MASTER_GRAPHICS_3D, .dst = MSM_BUS_SLAVE_EBI_CH0, .ab = 0, - .ib = KGSL_CONVERT_TO_MBPS(1600), //200 MHz GPU + .ib = KGSL_CONVERT_TO_MBPS(2400), //300 MHz GPU }, }; @@ -2622,7 +2622,7 @@ static struct msm_bus_vectors grp3d_nomi .src = MSM_BUS_MASTER_GRAPHICS_3D, .dst = MSM_BUS_SLAVE_EBI_CH0, .ab = 0, - .ib = KGSL_CONVERT_TO_MBPS(2400), //300 MHz GPU + .ib = KGSL_CONVERT_TO_MBPS(3200), //400 MHz GPU }, }; @@ -2631,7 +2631,7 @@ static struct msm_bus_vectors grp3d_nomi .src = MSM_BUS_MASTER_GRAPHICS_3D, .dst = MSM_BUS_SLAVE_EBI_CH0, .ab = 0, - .ib = KGSL_CONVERT_TO_MBPS(3968), //400 MHz GPU + .ib = KGSL_CONVERT_TO_MBPS(3840), //480 MHz GPU }, }; @@ -2640,7 +2640,7 @@ static struct msm_bus_vectors grp3d_max_ .src = MSM_BUS_MASTER_GRAPHICS_3D, .dst = MSM_BUS_SLAVE_EBI_CH0, .ab = 0, - .ib = KGSL_CONVERT_TO_MBPS(5290), //480 MHz GPU + .ib = KGSL_CONVERT_TO_MBPS(4096), //512 MHz GPU }, }; @@ -2687,7 +2687,7 @@ static struct msm_bus_vectors grp2d0_nom .src = MSM_BUS_MASTER_GRAPHICS_2D_CORE0, .dst = MSM_BUS_SLAVE_EBI_CH0, .ab = 0, - .ib = KGSL_CONVERT_TO_MBPS(1600), //200 MHz + .ib = KGSL_CONVERT_TO_MBPS(2400), //300 MHz }, }; @@ -2696,7 +2696,7 @@ static struct msm_bus_vectors grp2d0_max .src = MSM_BUS_MASTER_GRAPHICS_2D_CORE0, .dst = MSM_BUS_SLAVE_EBI_CH0, .ab = 0, - .ib = KGSL_CONVERT_TO_MBPS(2400), //300MHz GPU = 2400 Mbps + .ib = KGSL_CONVERT_TO_MBPS(2560), //320MHz GPU = 2400 Mbps }, }; @@ -2735,7 +2735,7 @@ static struct msm_bus_vectors grp2d1_nom .src = MSM_BUS_MASTER_GRAPHICS_2D_CORE1, .dst = MSM_BUS_SLAVE_EBI_CH0, .ab = 0, - .ib = KGSL_CONVERT_TO_MBPS(1600), //200 MHz GPU + .ib = KGSL_CONVERT_TO_MBPS(2400), //300 MHz GPU }, }; @@ -2744,7 +2744,7 @@ static struct msm_bus_vectors grp2d1_max .src = MSM_BUS_MASTER_GRAPHICS_2D_CORE1, .dst = MSM_BUS_SLAVE_EBI_CH0, .ab = 0, - .ib = KGSL_CONVERT_TO_MBPS(2400), // 300Mhz = 2400 Mbps + .ib = KGSL_CONVERT_TO_MBPS(2560), // 320Mhz = 2400 Mbps }, }; @@ -2788,27 +2788,27 @@ static struct resource kgsl_3d0_resource static struct kgsl_device_platform_data kgsl_3d0_pdata = { .pwrlevel = { { - .gpu_freq = 480000000, + .gpu_freq = 512000000, .bus_freq = 4, .io_fraction = 0, }, { - .gpu_freq = 400000000, + .gpu_freq = 480000000, .bus_freq = 3, .io_fraction = 0, }, { - .gpu_freq = 300000000, + .gpu_freq = 400000000, .bus_freq = 2, .io_fraction = 33, }, { - .gpu_freq = 200000000, + .gpu_freq = 300000000, .bus_freq = 1, .io_fraction = 100, }, { - .gpu_freq = 27000000, + .gpu_freq = 177778000, .bus_freq = 0, }, }, @@ -2816,7 +2816,7 @@ static struct kgsl_device_platform_data .max_level = 0, .num_levels = 5, .set_grp_async = NULL, - .idle_timeout = HZ/12, + .idle_timeout = HZ/5, .nap_allowed = true, .clk_map = KGSL_CLK_CORE | KGSL_CLK_IFACE | KGSL_CLK_MEM_IFACE, #ifdef CONFIG_MSM_BUS_SCALING @@ -2854,11 +2854,11 @@ static struct resource kgsl_2d0_resource static struct kgsl_device_platform_data kgsl_2d0_pdata = { .pwrlevel = { { - .gpu_freq = 300000000, + .gpu_freq = 320000000, .bus_freq = 2, }, { - .gpu_freq = 200000000, + .gpu_freq = 300000000, .bus_freq = 1, }, { @@ -2908,11 +2908,11 @@ static struct resource kgsl_2d1_resource static struct kgsl_device_platform_data kgsl_2d1_pdata = { .pwrlevel = { { - .gpu_freq = 300000000, + .gpu_freq = 320000000, .bus_freq = 2, }, { - .gpu_freq = 200000000, + .gpu_freq = 300000000, .bus_freq = 1, }, {