Updated to 2.6.32.27
/arch/arm/include/asm/ptrace.h
blob:6674c42a1a27585c93d18146a0a3219aeea6191e -> blob:1df645713d483fedd29e10bbd8cbc79678edb392
--- arch/arm/include/asm/ptrace.h
+++ arch/arm/include/asm/ptrace.h
@@ -150,19 +150,24 @@ struct pt_regs {
*/
static inline int valid_user_regs(struct pt_regs *regs)
{
- long mode = regs->ARM_cpsr & MODE_MASK;
+ unsigned long mode = regs->ARM_cpsr & MODE_MASK;
- if (((mode == USR_MODE) ||
- ((elf_hwcap & HWCAP_26BIT) && (mode == USR26_MODE))) &&
- (regs->ARM_cpsr & PSR_I_BIT) == 0) {
- regs->ARM_cpsr &= ~(PSR_F_BIT | PSR_A_BIT);
- return 1;
+ /*
+ * Always clear the F (FIQ) and A (delayed abort) bits
+ */
+ regs->ARM_cpsr &= ~(PSR_F_BIT | PSR_A_BIT);
+
+ if ((regs->ARM_cpsr & PSR_I_BIT) == 0) {
+ if (mode == USR_MODE)
+ return 1;
+ if (elf_hwcap & HWCAP_26BIT && mode == USR26_MODE)
+ return 1;
}
/*
* Force CPSR to something logical...
*/
- regs->ARM_cpsr &= PSR_f | PSR_s | (PSR_x & ~PSR_A_BIT) | PSR_T_BIT | MODE32_BIT;
+ regs->ARM_cpsr &= PSR_f | PSR_s | PSR_x | PSR_T_BIT | MODE32_BIT;
if (!(elf_hwcap & HWCAP_26BIT))
regs->ARM_cpsr |= USR_MODE;