Initial OC
/arch/arm/mach-exynos/clock-exynos4212.c
blob:a2f5d4110e614ac737617ee1fce51a19b5614e3f -> blob:de0d623e5ffabf89c552e7635298c72113ae3774
--- arch/arm/mach-exynos/clock-exynos4212.c
+++ arch/arm/mach-exynos/clock-exynos4212.c
@@ -976,13 +976,23 @@ static struct vpll_div_data vpll_div_421
{54000000, 2, 72, 4, 0, 0, 0, 0},
{108000000, 2, 72, 3, 0, 0, 0, 0},
{160000000, 3, 160, 3, 0, 0, 0, 0},
+ {200000000, 3, 200, 3, 0, 0, 0, 0},
{266000000, 3, 133, 2, 0, 0, 0, 0},
{275000000, 2, 92, 2, 43692, 0, 0, 0},
{300000000, 2, 100, 2, 0, 0, 0, 0},
{333000000, 2, 111, 2, 0, 0, 0, 0},
{350000000, 3, 175, 2, 0, 0, 0, 0},
+ {400000000, 3, 100, 1, 0, 0, 0, 0},
{440000000, 3, 110, 1, 0, 0, 0, 0},
+ {500000000, 2, 166, 2, 0, 0, 0, 0},
{533000000, 3, 133, 1, 16384, 0, 0, 0},
+ {600000000, 2, 100, 1, 0, 0, 0, 0},
+ {640000000, 3, 160, 1, 0, 0, 0, 0},
+ {666000000, 2, 111, 1, 0, 0, 0, 0},
+ {700000000, 3, 175, 1, 0, 0, 0, 0},
+ {733000000, 2, 122, 1, 0, 0, 0, 0},
+ {750000000, 2, 125, 1, 0, 0, 0, 0},
+ {800000000, 2, 133, 1, 0, 0, 0, 0},
};
static unsigned long exynos4212_vpll_get_rate(struct clk *clk)