--- arch/x86/include/asm/pgtable-3level.h

+++ arch/x86/include/asm/pgtable-3level.h

@@ -69,8 +69,6 @@ static inline void native_pmd_clear(pmd_

static inline void pud_clear(pud_t *pudp)

{

- unsigned long pgd;

-

set_pud(pudp, __pud(0));

/*

@@ -79,13 +77,10 @@ static inline void pud_clear(pud_t *pudp

* section 8.1: in PAE mode we explicitly have to flush the

* TLB via cr3 if the top-level pgd is changed...

*

- * Make sure the pud entry we're updating is within the

- * current pgd to avoid unnecessary TLB flushes.

+ * Currently all places where pud_clear() is called either have

+ * flush_tlb_mm() followed or don't need TLB flush (x86_64 code or

+ * pud_clear_bad()), so we don't need TLB flush here.

*/

- pgd = read_cr3();

- if (__pa(pudp) >= pgd && __pa(pudp) <

- (pgd + sizeof(pgd_t)*PTRS_PER_PGD))

- write_cr3(pgd);

}

#ifdef CONFIG_SMP